A Comparative Study of Joint Power and Reliability Management Techniques in Multicore Embedded Systems

Low power consumption and high-reliability are often major objectives in the design of embedded systems. To reduce power consumption, embedded systems usually employ system-level power management techniques, e.g. Dynamic Voltage Scaling (DVS) and Dynamic Power Management (DPM). To achieve high reliability, embedded systems often exploit fault-tolerant techniques. Fault-tolerant techniques are in a trade-off with energy consumption, peak-power consumption, and temperature. Thus, different methods have been introduced that simultaneously consider reliability and power consumption as the system constraints. Several novel methods have been proposed in previous works to reduce the power consumption of fault-tolerant systems, but there are no published guidelines to help designers to select the best approach for a given application. In this paper, we investigate the effectiveness and efficiency of these methods by evaluating them in an identical simulation environment for an accurate evaluation.